1. Field of the Invention
This invention is related to Automatic Test Equipment (ATE) testing and characterization of mixed signal integrated circuits (ICs), and more particularly, to testing thresholds in mixed signal ICs that have a comparator circuit.
2. Related Art
ATE has been widely used for IC production test and characterization. The state-of-art ATE is equipped not only with digital pins with programmable pin electronics operating at high frequency, but also with different frequency range AWG (arbitrary waveform generator) that provides an arbitrary stimulus, and different resolution waveform digitizers to capture a variety of output waveforms. Most of today's mixed-signal ATE also includes certain timing measurement instruments. The comprehensive spectrum of ATE instrumentation makes it a large capital investment, either through purchasing or through leasing. Therefore, ATE test programs need to be developed quickly. Also, test time per device needs to be minimized, while providing maximum test coverage to maintain high IC quality.
With the introduction of so called “systems-on-a-chip”, it is common to see analog circuits integrated into almost every contemporary IC. Typical analog IC blocks include power amplifiers, ADCs (analog-to-digital converters), DACs (digital-to-analog converters) and PLLs (phase lock loops). Comparator circuits have been widely applied as well, such as “squelch and signal detect” circuit on 10/100 Ethernet transceivers, DiseqC circuits on satellite set-top box LNB interfaces, etc. “Squelch and Signal Detect” are the analog front end circuitry on the 10/100 Base T Ethernet transceiver. Squelch is used for 10 Base T and Signal Detect used for 100 Base T. Squelch circuits are used to reject signals that are weaker than a threshold level. Signal detect is used to accept incoming signal greater than a predefined threshold as valid data. DiSEqC stands for Digital Satellite Equipment Control, LNB stands for Low Noise Block-Downconverter. A DiseqC circuit on a satellite set-top box LNB interfaces is a discrete component on the satellite dish that blocks all frequency bands except the low frequency video signal. DiSEqC circuits have a programmable threshold to detect incoming signal as a valid video signal or as interference.
The comparator circuit is normally based on a two-terminal operational amplifier. One terminal of the comparator is tied to a programmable voltage source, which provides a threshold voltage for the comparator. When another input terminal is connected to an input voltage higher than the threshold voltage, the comparator output goes HIGH. In the opposite situation, the comparator outputs goes LOW when the input terminal is connected to a voltage lower than the threshold voltage. In order to improve the noise margin, comparator designs normally have a built-in hysteresis, which means that the input will see different threshold voltage when input is increased from LOW to HIGH compared to decreasing it from HIGH to LOW. The difference between the threshold voltages when measured from the two directions, is called a hysteresis voltage.
In general, due to the relative simplicity of comparator design, test and characterization of comparator should be relatively easy. Unfortunately, current ATE test techniques applied to testing and characterization of comparators are relatively awkward and time consuming.
Several test techniques are known for comparator testing. One programmable PMU (Parametric Measurement Unit) can be used to source a DC voltage to the comparator input and another programmable PMU is used to measure the comparator output voltage.
The input DC voltage starts from a low value and gradually increments, until the comparator output goes from LOW to HIGH. The input DC voltage then gradually decreases, until the comparator output turns from HIGH to LOW. Both transition voltages are logged as comparator threshold voltages.
This method requires multiple steps to search for threshold voltages, and is very time consuming. Currently, it is only implemented in characterization testing, while production testing uses only two input levels to perform “go-no go” testing. One relatively high input level is chosen to ensure a comparator output measured at HIGH, and one relatively low input level is selected to ensure a comparator output measured at LOW.
This approach relies on characterization data to pick a HIGH and LOW input level for production testing. It is inevitably imprecise and ignores the comparator hysteresis characteristics.
A sine wave or square wave can be used as an input to the comparator, instead of a DC voltage. Since the comparator output will be a square wave under this stimulus, capturing this output is more difficult than measuring a DC voltage. Typically, certain testability is included with the IC design, which uses one output pin to flag comparator output response, when the input sine wave or square wave amplitude exceeds comparator threshold voltage. In that case, the output pin changes its output from LOW to HIGH to indicate that the comparator is ON. Otherwise, the pin will stay at LOW. Instead of incrementing and decrementing PMU DC voltage, the sine wave or square wave input amplitude can be varied to search for comparator threshold voltage.
This test method has the same shortcoming as the previous method—i.e., long test time. In production testing, the same approach is used to pick two sine wave input amplitudes to perform “go-no go” test.
A ramp wave sourced from ATE AWG can be used as input to the comparator. An up ramp is used to measure comparator threshold voltage from low to HIGH (see FIG. 1), and a down ramp is used to measure threshold voltage from HIGH to LOW (see FIG. 2). The comparator output is captured, and its threshold voltage can be calculated from ramp amplitude and output pulse duty cycle.
Unfortunately, sourcing an ideal ramp wave from the AWG can be a difficult task in certain circumstances. Between the up ramp and the down ramp, there is a fast transition in voltage slope, which requires Vpk change during a short time interval of 1/Fs (here, Fs is the AWG sampling frequency). This poses a problem when AWG sees large capacitive loads. The transition slope elongates to multiples of (1/Fs), and ringing may be seen on the ramp part of the waveform.
For better measurement accuracy, typically a low pass filter is required to smooth out the ramp output sourced from AWG (the ramp output from AWG without filtering is actually a step-ramp). The fast transition slope between ramps, which is the only high frequency component in the ramp spectrum, makes the output ramp distorted when the low pass filter is applied. (FIGS. 1 and 2 show a case when the ramp is 25 Khz, AWG sampling frequency is 1 MS/s, and a low pass filter of 300 Khz is applied).
The non-ideal ramp input means test measurement accuracy is questionable. Triangle wave would be a choice for testing comparator without hysteresis, otherwise the threshold voltage cannot be calculated based on triangle wave amplitude and output pulse width.